Publications

Papers, Studies, Applications

The following sections contain different literature materials. First you can find the main reference papers related to the internals of our field solvers; then a selection from the impressive number of application studies done with the aid of these solvers; and a list of the main papers using FastCap and FastHenry as golden references.

Overall, thousand of papers cite FastCap, FastHenry and FastFieldSolvers. You can search for them on Google Scholar following the links 'FastCap', 'FastHenry', or 'FastFieldSolvers'.

Main Reference Papers

FastCap2

S. M. Rao, T.K. Sarkar, R.F. Harrington, "The Electrostatic Field of Conducting Bodies in Multiple Dielectric Media", IEEE Transactions on Microwave Theory and Techniques, Vol. 32, No. 11, Nov 1984

K. S. Nabors, "Efficient Three-Dimensional Capacitance Calculation", PhD thesis at the Massachusetts Institute of Technology, May 1993

K. S. Nabors, J. White, "Multipole-Accelerated Capacitance Extraction Algorithms for 3-D Structures with Multiple Dielectrics", IEEE Transactions on Circuits and Systems - I: Fundamental Theory and Applications, Vol. 39, No. 11, Nov 1992

J. Tausch, J. White, "Capacitance Extraction of 3-D Conductor Systems in Dielectric Media with High-Permittivity Ratios", IEEE Transactions on Microwave Theory and Techniques, Vol. 47, No. 1, Jan 1999

J. Tausch, J. White, "Multipole Accelerated Capacitance Calculation for Structures with Multiple Dielectrics with High Permittivity Ratios", ACM Proceedings of the 33rd annual Design Automation Conference, 1996

FastHenry2

M. Kamon, "Efficient Techniques for Inductance Extraction of Complex 3-d Geometries", Master's Thesis at the Massachusetts Institute of Technology, Electrical Engineering and Computer Science, Feb 1994

L.M. Silveira, M. Kamon, I. Elfadel, J. White, "A Coordinate-Transformed Arnoldi Algorithm for Generating Guaranteed Stable Reduced-Order Models of RLC Circuits", Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design, 1997

L. M. Silveira, M. Kamon, J. White, "Efficient Reduced-Order Modeling of Frequency-Dependent Coupling Inductances associated with 3-D Interconnect Structures", IEEE Transactions on Components, Packaging and Manufacturing Technology, Vol. 19, Issue 2, May 1996

M. Kamon, "Fast Parasitic Extraction and Simulation of Three-Dimensional Interconnect via Quasistatic Analysis", PhD thesis at the Massachusetts Institute of Technology, Feb 1998

FasterCap

S. M. Rao, T.K. Sarkar, R.F. Harrington, "The Electrostatic Field of Conducting Bodies in Multiple Dielectric Media", IEEE Transactions on Microwave Theory and Techniques, Vol. 32, No. 11, Nov 1984

K. S. Nabors, "Efficient Three-Dimensional Capacitance Calculation", PhD thesis at the Massachusetts Institute of Technology, May 1993

K. S. Nabors, J. White, "Multipole-Accelerated Capacitance Extraction Algorithms for 3-D Structures with Multiple Dielectrics", IEEE Transactions on Circuits and Systems - I: Fundamental Theory and Applications, Vol. 39, No. 11, Nov 1992

J. Tausch, J. White, "Capacitance Extraction of 3-D Conductor Systems in Dielectric Media with High-Permittivity Ratios", IEEE Transactions on Microwave Theory and Techniques, Vol. 47, No. 1, Jan 1999

J. Tausch, J. White, "Multipole Accelerated Capacitance Calculation for Structures with Multiple Dielectrics with High Permittivity Ratios", ACM Proceedings of the 33rd annual Design Automation Conference, 1996

A.W. Appel, "An Efficient Program for Many-Body Simulations or Cray Performance from a Vax", Report No. CMU-CS-83-118, Carnegie-Mellon University, Dept. of Computer Science, Mar 1983

A.W. Appel, "An Investigation of Galaxy Clustering Using an Asymptotically Fast N-body Algorithm", PhD Thesis, Princeton University, 1991

P. Hanrahan, D. Salzman, L. Aupperle, "A Rapid Hierarchical Radiosity Algorithm", ACM SIGGRAPH Computer Graphics, Vol. 25, No. 4, 1991

Weiping Shi, Jianguo Liu, Naveen Kakani, Tiejun Yu, "A Fast Hierarchical Algorithm for Three-Dimensional Capacitance Extraction", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 21, No. 3, Mar 2002

Wei Zhuang, "A 3-D Capacitance Extraction Algorithm based on Kernel Independent Hierarchical Method and Geometric Moments", Master Thesis, Texas A&M University, May 2006

FastImp

J. Wang, J. Tausch, J. White, "A Wide Frequency Range Surface Integral Formulation for 3-D RLC Extraction", Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, pp. 453-458, 1999

Zhenhai Zhu, Jingfang Huang, Ben Song, J. White, "Improving the Robustness of a Surface Integral Formulation for Wideband Impedance Extraction of 3D Structures", Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, pp. 592-597, 2001

Zhenhai Zhu, "Efficient Techniques forWideband Impedance Extraction of Complex 3-D Geometries", Master's Thesis at the Massachusetts Institute of Technology, Electrical Engineering and Computer Science, Aug 2002

Ben Song, Zhenhai Zhu, J.D. Rockway, J. White, "A New Surface Integral Formulation For Wideband Impedance Extraction of 3-D Structures", Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design, Nov 2003

Applications

EMC

O. Valorge, B. Gosselin, L-F. Tanguay, M. Sawan, "Electromagnetic Compatibility Modeling in Low-Noise Medical Sensor Interfaces", IEEE International Symposium on Circuits and Systems, ISCAS, 2007

B.J. Pierquet, T.C. Neugebauer, D.J. Perreault, "Inductance Compensation of Multiple Capacitors With Application to Common- and Differential-Mode Filters", IEEE Transactions on Power Electronics, Vol. 21, No. 6, Nov 2006

D. Cotter, M. Paakkinen, "Scalable PEEC-SPICE Modelling for EMI Analysis of Power Electronic Packages and Subsystems", 8th Electronics Packaging Technology Conference, EPTC, 2006

IC Design

D.K. Shaeffer, T.H. Lee, "A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier", IEEE Journal of Solid-State Circuits, Vol. 32, No. 5, May 1997

M. Tormanen, H. Sjoland, "A 25-GHz Differential LC-VCO in 90-nm CMOS", IEEE Asia Pacific Conference on Circuits and Systems, APCCAS, 2008

B. De Muer, C. De Ranter, J. Crols, M. Steyaert, "A Simulator-Optimizer for the Design of Very Low Phase Noise CMOS LC-Oscillators", Proceedings of ICECS '99, The 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

G. Loi, B. Agraval, N. Srivastava, Sheng-Chih Lin, T. Sherwood, K. Banerjee, "A Thermally-Aware Performance Analysis of Vertically Integrated (3-D) Processor-Memory Hierarchy", Proceedings of the 43rd annual Design Automation Conference, ACM, pp. 991-996, Jul 2006

R. Thuringer, "Characterization of Integrated Lumped Inductors and Transformers", R. Thuringer Thesis, Technischen Universitaet Wien, 2002

A. Nainani, S. Palit, P.K. Singh, U. Ganguly, N. Krishna, J. Vasi, S. Mahapatra, "Development of A 3D Simulator for Metal Nanocrystal (NC) Flash Memories under NAND Operation", IEEE International Electron Devices Meeting, IEDM, 2007

Y. Wang, "Millimeter Wave Transceiver Fronted Circuits in Advanced SiGe Technology with Considerations for On-Chip Passive Component Design and Simulation", Y. Wang PhD Thesis, Cornell University, 2006

J. Wood, T.C. Edwards, S. Lipa, "Rotary Traveling-Wave Oscillator Arrays: A New Clock Technology", IEEE Journal of Solid-State Circuits, Vol. 36, No. 11, Nov 2001

T. Makkonen, S. Kondratiev, V.P. Plessky, T. Thorvaldsson, J. Koskela, J. V. Knuuttila, M.M. Salomaa, "Surface Acousting Wave Impedance Element ISM Duplexer: Modeling and Optical Analysis", IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control, Vol. 48, No. 3, May 2001

IC Packaging

T. Arnborg, T. Johansson, "3D Characterization of RF Power Transistors", Proceedings of the 1999 International Conference on Microelectronic Test Structures, ICMTS, 1999

X. Qi, C.P. Yue, T. Arnborg, H.T. Soh, H. Sakai, Z. Yu, R.W. Dutton, "A Fast 3-D Modeling Approach to Electrical Parameters Extraction of Bonding Wires for RF Circuits", IEEE Transactions on Advanced Packaging, Vol. 23, No. 3, Aug 2000

E. Di Lorenzo, "Caratterizzazione Elettromagnetica di Packages Ultraminiaturizzati Applicati a Memorie Flash-EEPROM", E. Di Lorenzo Thesis, Politecnico di Milano, 1998

Xiaoning Qi, "High Frequency Characterization and Modeling of On-Chip Interconnects and RF IC Bonds", X. Qi PhD Thesis, Stanford University, Jun 2001

Inductor Design

V. Blaschke, J. Victory, "Accurate Inductance De-embedding Technique for Scalable Inductor Models", IEEE International Conference on Microelectronic Test Structures, Mar 2007

S.I. Babic, C. Akyel, "Calculating Mutual Inductance Between Circular Coils With Inclined Axes in Air", IEEE Transactions On Magnetics, Vol.44, No.7, Jul 2008

D. Kehrer, "Design of Monolithic Integrated Lumped Transformers in Silicon-based Technologies up to 20 GHz", Master Thesis, Technischen Universitaet Wien, Dec 2000

J. Holma, M.J. Barnes, "Initial measurements on a prototype inductive adder for the CLIC kicker systems", IEEE Pulsed Power and Plasma Science Conference, San Francisco, CA, USA, Oct 2013

D. Kehrer, W. Simbuerger, H-D. Wohlmuth, A.L. Scholtz, "Modeling of Monolithic Lumped Planar Transformers up to 20 GHz", IEEE Custom Integrated Circuits Conference, 2001

J. Holma, M.J. Barnes, S.J. Ovaska, "Modelling of Parasitic Inductances of a High Precision Inductive Adder for CLIC", Proceedings of IPAC2013, Shanghai, China, 2013

C. Akyel, S.I. Babic, M.-M. Mahmoudi, "Mutual Inductance Calculation for Non-Coaxial Circular Air Coils with Parallel Axes", Progress in Electromagnetics Research, PIER 91, pp.287-301, 2009

T.N. Baig, "New Directions in the Design of MRI Gradient Coils", T.N. Baig PhD Thesis, Case Western Reserve University, 2007

R. M. Matias, "Optimization of Inductive Coupling Between Nearest Neighbor RF Coil Elements in a Phased Array Design Using the Code FastHenry", ICEAA International Conference on Electromagnetics in Advanced Applications, Sep 2007

Interconnections

P. Jacqmaer, J. Zwysen, R. Gelagaev, J. Driesen, "Accurately modelling of parasitics in power electronics circuits using an easy RLC-extraction method", IEEE International Instrumentation and Measurement Technology Conference (I2MTC), 2012

A. Bansal, B. C. Paul, K. Roy, "An Analytical Fringe Capacitance Model for Interconnects Using Conformal Mapping", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 25, No. 12, Dec 2006

J. Zwysen, P. Jacqmaer, R. Gelagaev, J. Driesen, "An Electromagnetic Circuit Simulator for Power Electronics", IEEE transactions on magnetics, pp. 799-802, 2012

A. Roy, J. Xu, M. H. Chowdhury, "Analysis of the impacts of signal slew and skew on the behavior of coupled RLC interconnects for different switching patterns", IEEE Transactions On Very Large Scale Integration (VLSI) Systems, Vol.18, No.2, Feb 2010

M. Wood, F. Schlagenhaufer, "Capacitance of an Open Circuit Via Port", IEEE International Symposium on Electromagnetic Compatibility, 2007

A. Morabito, "Caratterizzazione e Ottimizzazione di Strutture Conduttive per Piastre a Circuito Stampato Dedicate al Trasporto di Segnali ad Alta Frequenza", A. Morabito Thesis, Università di Catania, 2003

A.T. Bryant, K. K. Vadlapati, J.P. Starkey, A.P. Goldney, S.Y. Kandilidis, D.A. Hinchley, "Current distribution in high power laminated busbars", IEEE Proceedings of the 2011-14th European Conference on Power Electronics and Applications, pp. 1-10, Aug 2011

X-C. Li, J-F. Mao, H-F. Huang, Y. Liu, "Global Interconnect Width and Spacing Optimization for Latency, Bandwidth and Power Dissipation", IEEE Transactions On Electron Devices, Vol. 52, No. 10, Oct 2005

P. Jacqmaer, "Hard- and Soft-Switching High-Frequency Power Electronics: Modelling of Parasitics and Electromagnetic Fields", P. Jacqmaer PhD Thesis, University of Leuven, Oct 2015

A.K. Goel, "High-Speed VLSI Interconnections", IEEE Press, 2007

S-W. Tu, W-Z. Shen, Y-W. Chang, T-C. Chen, J-Y. Jou, "Inductance Modeling for On-Chip Interconnects", Journal of Analog Integrated Circuits and Signal Processing, Vol. 35, Issue 1, 01/04/2003

Y. Massoud, S. Majors, J. Kawa, T. Bustami, D. MacMillen, J. White, "Managing On-Chip Inductive Effects", IEEE Transactions On Very Large Scale Integration (VLSI) Systems, Vol.10, No.6, Dec 2002

V. Shatri, R. Sefab, L. Kurtajc, "MATLAB Partial Element Equivalent Circuit Toolbox for Solving Coupled Electromagnetic-Circuit Problems", International Journal of Current Engineering and Technology, 2013

Li Hao, H-M. Rein, "Millimeter-Wave VCOs With Wide Tuning Range and Low Phase Noise, Fully Integrated in a SiGe Bipolar Production Technology", IEEE Journal of Solid-State Circuits, 38.2, pp. 184-191, 2003

N.D. Arora, L. Song, "Modeling and Characterization of On-Chip Inductance for High Speed VLSI Design", NSTI-Nanotech, 2005

E. Laermans, J.D. Geest, D.D. Zutter, F. Olyslager, S. Sercu, D. Morlion, "Modelling Differential Via Holes", IEEE Transactions on Advanced Packaging, Aug 2001

J. Zhang, E.G. Friedman, "Mutual Inductance Modeling for Multiple RLC Interconnects with Application to Shield Insertion", Proceedings of IEEE International SOC Conference, pp. 344-347, Sep 2004

M. Kariyanakatte, "Optimization of Interconnect Structures", ESE526, Dec 2001

Z. Zhu, J. Phillips, Z-C. Ye, "Parasitic Effects Analysis of Circuit Structures", Patent US 7,853,910 B1, Dec 2010

Wu Zhong Lin, Yao Jiang Zhang, Er Ping Li, "Proper Orthogonal Decomposition in the Generation of Reduced Order Models for Interconnects", IEEE Transactions on Advanced Packaging, 31.3, pp 627-636, 2008

S-W. Tu, J-Y. Jou, Y-W. Chang, "RLC Coupling-Aware Simulation for On-Chip Buses and their Encoding for Delay Reductions", IEEE International Symposium on Circuits and Systems, ISCAS, 2005

J.W. Phinney, D.J. Perreault, J.H. Lang, "Synthesis of Lumped Transmission-Line Analogs", 37th IEEE Power Electronics Specialists Conference, PESC'06, 2006

X2Y® Attenuators, "X2Y® Capacitors in IC Back-Side Mounting Applications", X2R Applicaton Note, 2006

Magnetics

M. Kaiser, M. Detert, M.A. Rube, A. El-Tahir, O.J. Elle, A. Melzer, B. Schmidt, G.H. Rose, "Resonant Marker Design and Fabrication Techniques for Device Visualization During Interventional Magnetic Resonance Imaging", Biomedical Engineering / Biomedizinische Technik, Vol. 60, Issue 2, Apr 2015

W.X. Qiang, "Theory and Modelling of Spin-Dependent Tunnelling", W.X. Qiang Master thesis, National University of Singapore, 2003

MEMS

L. W. Zhong, "Model Order Reduction Techniques in Microelectromechanics", L. W. Zhong PhD Thesis, National University of Singapore, 2004

V.M. Lubecke, B. Barber, E. Chan, D. Lopez, M.E. Gross, P. Gammel, "Self-Assembling MEMS Variable and Fixed RF Inductors", IEEE Transactions on Microwave Theory and Techniques, Vol. 49, No. 11, Nov 2001

Nanotechnology

Pei Zhao, M. Choudhury, K. Mohanram, Jing Guo, "Computational Model of Edge Effects in Graphene Nanoribbon Transistors", Nano Research, Vol. 1, Issue 5, pp. 395-402, Nov 2008

A.T. Bollinger, A. Rogachev, A. Bezryadin, "Dichotomy in short superconducting nanowires: Thermal phase slippage vs. Coulomb blockade", Europhysics Letters, 76 (3), pp. 505-511, 2006

N. Srivastava, K. Banerjee, "Performance Analysis of Carbon Nanotube Interconnects for VLSI Applications", IEEE/ACM International Conference on Computer-Aided Design, ICCAD, 2005

X. Wang, Y. Ouyang, X. Li, H. Wang, J. Guo, H. Dai, "Room Temperature All Semiconducting sub-10nm Graphene Nanoribbon Field-Effect Transistors", APS Physical Review Letters, Vol. 100, Issue 20, 2008

Quantum Computing

C.D. Hill, E. Peretz, S.J. Hile, M.G. House, M. Fuechsle, S. Rogge, M.Y. Simmons, L.C.L. Hollenberg, "A Surface Code Quantum Computer in Silicon", Science Advances, Vol.1, No. 9, Oct 2015

H. Shimada, S. Katori, S. Gandrothula, T. Deguchi, Y. Mizugaki, "Bloch Oscillation in a One-Dimensional Array of Small Josephson Junctions", Journal of the Physical Society of Japan 85.7, 2016

R. Kalra, "Design and Modeling of Silicon Spin Qubits for Quantum Computing", Taste Of Research Summer Scholarship 2009-10, University of New South Wales, 2010

J. Han, P. Jonker, "Novel Computing Architecture on Arrays of Josephson Persistent Current Bits", Nanotech 2002 Vol. 1, Technical Proceedings of the 2002 International Conference on Modeling and Simulation of Microsystems, Chapter 12: Circuit Simulation, 2002

K. Y. Tan, K. W. Chan, M. Mottonen, A. Morello, C. Yang, J. van Donkelaar, A. Alves, J.-M. Pirkkalainen, D. N. Jamieson, R. G. Clark, A. S. Dzurak, "Transport Spectroscopy of Single Phosphorus Donors in a Silicon Nanoscale Transistor", ACS Nano Letters, 10 (1), pp. 11–15, Feb 2010

RF

R.R.A. Syms, L. Solymar, "Bends in magneto-inductive waveguides", Metamaterials, Volume 4, Issue 4, pp. 161-169, Elsevier B.V., Dec 2010

Wireless Links

O. Atasoy, C. Dehollain, "A Study for Remote Powering of a Knee Prosthesis Through Inductive Link", IEEE Conference on Ph. D. Research in Microelectronics and Electronics (PRIME), 2010

S. Atluri, M. Ghovanloo, "A Wideband Power-Efficient Inductive Wireless Link for Implantable Microelectronic Devices Using Multiple Carriers", IEEE Transactions on Circuits and Systems, Oct 2007

S. Atluri, "A Wideband Power-Efficient Inductive Wireless Link for Implantable Microelectronic Devices Using Multiple Carriers", Master Thesis, North Carolina State University, 2006

S. Atluri, M. Ghovanloo, "Design of a Wideband Power-Efficient Inductive Wireless Link for Implantable Biomedical Devices Using Multiple Carriers", Proceedings of the 2nd International IEEE EMBS Conference on Neural Engineering, Mar 2005

R.R. Harrison, "Designing Efficient Inductive Power Links for Implantable Devices", IEEE International Symposium on Circuits and Systems, ISCAS, 2007

C. Reinhold, P. Scholz, W. John, U. Hilleringmann, "Efficient Antenna Design of Inductive Coupled RFID-Systems with High Power Demand", Journal of Communications, Vol. 2, No. 6, Nov 2007

B. Waters, "High Q Resonant Coupling and RF-DC Conversion for Wireless Power Transfer", Columbia University, Dec 2009

K.M. Silay, C. Dehollain, M. Declercq, "Improvement of Power Efficiency of Inductive Links for Implantable Devices", Research in Microelectronics and Electronics, PRIME, 2008

F. Deicke, H. Graetz, W-J. Fischer, "Virtual Optimisation and Verification of Inductively Coupled Transponder Systems", Radio Frequency Identification Fundamentals and Applications, Design Methods and Solutions, ISBN 978-953-7619-72-5, pp. 324, INTECH, Croatia, Feb 2010

R. Puers, K.V. Schuylenbergh, M. Catrysse, B. Hermans, "Wireless Inductive Transfer of Power and Data", Analog Circuit Design, pp. 395–414, 2006

Citations as Golden References

Wei Zhuang, "A 3-D Capacitance Extraction Algorithm based on Kernel Independent Hierarchical Method and Geometric Moments", Master Thesis, Texas A&M University, May 2006

W. Chai, D. Jiao, C-K. Koh, "A Direct Integral-Equation Solver of Linear Complexity for Large-Scale 3D Capacitance and Impedance Extraction", ACM/IEEE 46th Design Automation Conference, DAC '09, 2009

Fangquing Yu, Weiping Shi, "A Divide-and-Conquer Algorithm for 3D Capacitance Extraction", Proceedings of ISQED, pp.253~258, 2004

Weiping Shi, Jianguo Liu, Naveen Kakani, Tiejun Yu, "A Fast Hierarchical Algorithm for Three-Dimensional Capacitance Extraction", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 21, No. 3, Mar 2002

S. Kapur, J. Zhao, "A Fast Method of Moments Solver for efficient parameter extraction of MCMs", Proceedings of the 34th annual conference on Design automation conference (DAC '97), 1997

Y. C. Pan, L. X. Wan, W.C. Chew, "A Fast Multipone Method Based Calculation of the Capacitance Matrix in a Stratified Medium", IEEE Antennas and Propagation Society International Symposium, 2000

D. Gope, S. Chakraborty, V. Jandhyala, "A Fast Parasitic Extractor Based on Low-Rand Multilevel Matrix Compression for Conductor and Dielectric Modeling in Microelectronics and MEMS", Design Automation Conference, 41st Conference on (DAC'04), 2004

S. A. Teo, B. L. Ooi, S. T. Chew, M. S. Leong, "A Fast PEEC Technique for Full-Wave Parameters Extraction of Distributed Elements", IEEE Microwave and Wireless Components Letters, Vol. 11, No. 5, May 2001

Z. Zhu, W. Hong, "A Generalized Algorithm for the Capacitance Extraction of 3-D VLSI Interconnects", IEEE Transactions on Microwave Theory and Techniques, Vol. 47, No. 10, Oct 1999

W. Hong, W-K. Sun, Z-H Zhu, H. Ji, B. Song, W. W-M. Dai, "A Novel Dimension-Reduction Technique for the Capacitance Extraction of 3-D VLSI Interconnects", IEEE Transactions on Microwave Theory and Techniques, Vol. 46, No. 8, Aug 1998

Y. Yi, P. Li, V. Sarin, W. Shi, "A Preconditioned Hierarchical Algorithm for Impedance Extraction of Three-Dimensional Structures With Multiple Dielectrics", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 27, No. 11, Nov 2008

H. Mahawar, V. Sarin, W. Shi, "A Solenoidal Basis Method For Efficient Inductance Extraction", In Proceedings of DAC'2002, pp.751~756, 2002

Z. Yang, Z. Wang, S. Fang, "A Virtual 3-D Multipole Accelerated Extractor for VLSI Parasitic Interconnect Capacitance", Proceedings of the 2001 Asia and South Pacific Design Automation Conference, 2001

Ong Eng Teo, "Accurate and Efficient Three-Dimensional Electrostatics Analysis using Singular Boundary Elements and Fast Fourier Transform on Multipoles (FFTM)", PhD Thesis, National University of Singapore, 2003

N.P. van der Meijs, T. Smedes, "Accurate Interconnect Modeling: Towards Multi-million Transistor Chips As Microwave Circuits", Technical Digest of the 1996 IEEE/ACM Int. Conf. on Computer-Aided Design, pp.244~251, 1996

W. Ding, G. Wang, "An Efficient Preconditioning Scheme for Fast Hierarchical Method in 3-D Capacitance Extraction of IC interconnect", 7th International Conference on ASIC, Guilin, Guangxi, China, Oct 2007

W. Yu, Z. Wang, "An Efficient Quasi-Multiple Medium Algorithm for the Capacitance Extraction of Actual 3-D VLSI Interconnects", Proceedings of ASP-DAC'2001, pp.366~372, 2001

M. Bächtold, J. G. Korvink, H. Baltes, "An Error Indicator and Automatic Adaptive Meshing for 3D Electrostatic Boundary Element Simulations", Boundary Elements XIX, Transaction: Modelling and Simulation volume 19, 1997

M. Bächtold, M. Emmenegger, J. G. Korvink, H. Baltes, "An Error Indicator and Automatic Adaptive Meshing for Electrostatic Boundary Element Simulations", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 16, No. 12, Dec 1997

H. Kim, C. C-P. Chen, "Be Careful of Self and Mutual Inductance Formulae", N/A, N/A

U. Geigenmueller, N.P. van der Meijs, "Cartesian Multipole Based Numerical Integration for 3D Capacitance Extraction", European Design and Test Conference. ED&TC 97. Proceedings, 1997

S. Gupta, L. T. Pileggi, "CHIME: Coupled Hierarchical Inductance Model Evaluation", DAC '04 Proceedings of the 41st annual Design Automation Conference, 2004

Zhong Yu-Lin, Zhao Zheng-Ming, "Comparison of Parasitic Parameters Extraction methods and Equivalent Circuits for a Grounding Model", IEEE International Conference on Electrical Machines and Systems (ICEMS), 2008

A. Heldring, J.M. Rius, J.M. Tamayo, J. Parrón, "Compressed Block-Decomposition Algorithm for Fast Capacitance Extraction", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 27, No. 2, 2008

Y. Nakashima, M. Ikeda, K. Asada, "Computational Cost Reduction in Extracting Inductance", ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design, 2001

Y. Yi, S. Yan, V. Sarin, W. Shi, "Development of Fast 3D Parasitic Extraction using Hierarchical Method for Integrated Circuits and Packages", Antennas and Propagation Society International Symposium, 2008

D. Gope, I. Chowdhury, V. Jandhyala, "DiMES: Multilevel Fast Direct Solver based on Multipole Expansions for Parasitic Extraction of Massively Coupled 3D Microelectronic Structures", Design Automation Conference, Proceedings. 42nd, 2005

Z. Ye, W. Yu, Z. Yu, "Efficient 3-D Capacitance Extraction Considering Lossy Substrate With Multilayered Green’s Function", IEEE Transactions on Microwave Theory and Techniques, Vol. 54, No. 5, May 2006

W. Yu, M. Zhang, Z. Wang, "Efficient 3-D Extraction of Interconnect Capacitance Considering Floating Metal Fills With Boundary Element Method", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 25, No. 1, Jan 2006

W. Wang, J. Fang, Y. Chen, "Efficient and Accurate Extraction of Frequency-Dependent Resistance and Inductance Parameters of Interconnects", Electrical Performance of Electronic Packaging, 1999

C.F. Wang, L.W. Li, P.S. Kooi, M.S. Leong, "Efficient Capacitance Computation for 3D Structures Based on AIM", Antennas and Propagation Society International Symposium. IEEE, 2000

N. Soveiko, M. S. Nakhla, "Efficient Capacitance Extraction Computations in Wavelet Domain", IEEE Transactions on Circuits and Systems - I: Fundamental Theory and Applications, Vol. 47, No. 5, May 2000

S. Yan, "Efficient Numerical Methods for Capacitance Extraction based on Boundary Element Method", PhD Thesis, Texas A&M University, Dec 2005

M. W. Beattie, L. T. Pileggi, "Electromagnetic Parasitic Extraction via a Multipole Method with Hierarchical Refinement", ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, 1999

W. Yu, Z. Wang, X. Hong, "Enhanced QMM-BEM Solver for 3-D Finite-Domain Capacitance Extraction with Multilayered Dielectrics", ICCD'03 Proceedings of the 21st International Conference on Computer Design, 2003

W. Yu, Z. Wang, "Enhanced QMM-BEM Solver for Three-Dimensional Multiple-Dielectric Capacitance Extraction Within the Finite Domain", IEEE Transactions on Microwave Theory and Techniques, Vol. 52, No. 2, Feb 2004

M. Beattie, B. Krauter, L. Alatan, L. Pileggi, "Equipotential Shells for Efficient Inductance Extraction", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 20, No. 1, Jan 2001

G. Zhong, C-K. Koh, "Exact Closed Form Formula for Partial Mutual Inductances of On-Chip Interconnects", Proceedings of 2002 IEEE International Conference on Computer Design, 2002

H. H. Pham, A. Nathan, "Exponential Expansion for Field Computation and Capacitance Extraction", IEEE Transactions on Circuits and Systems - I: Fundamental Theory and Applications, Vol. 48, No. 10, Oct 2001

J. Wang, J. White, "Fast Algorithms for Computing Electrostatic Geometric Sensitivities", International Conference on Simulation of Semiconductor Processes and Devices, SISPAD '97, 1997

C.F. Wang, L.W. Li, P.S. Kooi, M.S. Leong, "Fast Capacitance Computation Using Three-Dimensional Second-Kind Integral Equation and AIM", IEEE Antennas and Propagation Society International Symposium, 2001

Y. Zhou, Z. Li, W. Shi, "Fast Capacitance Extraction in Multilayer Conformal and Embedded Dielectric Using Hybrid Boundary Element Method", ACM/IEEE 44th Design Automation Conference, DAC '07, 2007

S. Yan, V. Sarin, W. Shi, "Fast Capacitance Extraction Using Inexact Factorization", IEEE 13th Topical Meeting on Electrical Performance of Electronic Packaging, 2004

H. Xuefei, "Fast Fourier Transform on Multipoles Algorithm for Elasticity and Stokes Flow", PhD Thesis, National University of Singapore, 2007

P. J. Restle, A. E. Ruehli, S.G. Walker, G. Papadopoulos, "Full-Wave PEEC Time-Domain Method for the Modeling of On-Chip Interconnects", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 20, No. 7, Jul 2001

T. Lu, Z. Wang, W. Yu, "Hierarchical Block Boundary-Element Method (HBBEM): A Fast Field Solver for 3-D Capacitance Extraction", IEEE Transactions on Microwave Theory and Techniques, Vol. 52, No. 1, Jan 2004

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