| T O P I C R E V I E W |
| carolyn |
Posted - Jun 06 2014 : 19:46:17
Is there a special way to calculate gap capacitance? I have made a file which has two lines sitting atop a Si substrate. When I run it, the capacitance matrix is 4 x 4 instead of 2 x 2. It seems to be treating the bottom faces of the lines (which have an 'outperm' of 11.7) as a separate entity from the rest of the line (which has an outperm of 1 for air). In the list file I have added the [+] to these structures so that they should be taken as one conductor. For example :
C LinePlate.txt 11.7 0.0 0.000245 0.0005 +
C LineCuff.txt 1 0.0 0.000245 0.0005 +
C LinePlate.txt 1 0.0 0.000245 0.0005002
Any Help on this would be greatly appreciated. |
| 5 L A T E S T R E P L I E S (Newest First) |
| Enrico |
Posted - Jun 17 2014 : 14:47:52
What you need to avoid is overlapping panels, no matter if they are dielectric or conductor panels. An interface must be either a dielectric-conductor interface, or a dielectric-dielectric interface.
Now, keeping this point in mind, yes in principle you should close the dielectric cube on the top where the lines are, using dielectric panels all around the conductor lines (including their gap).
Now what is the error if you don't do it? Difficult to say in general. As a principle, if the dielectric interface is large enough, you probably don't need to close it (e.g. two plates embedded in two different dielectrics, where the dielectric is much larger than the size of the conductors. In this case you can model a large open dielectric interface plate, say 9 times the area of the conductor plate, and most probably get an accurate enough result anyway).
This is a very qualitative answer. For the details on how FasterCap treats the dielectrics, and why you can have open interfaces, you can refer to our white paper "The Treatment of Dielectrics in FasterCap" available under the Literature section.
Best Regards,
Enrico
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| carolyn |
Posted - Jun 11 2014 : 18:04:48
Ah! Thank you, this was not clear to me.
Could you also clarify, FasterCap seems to allow 'open' dielectric geometries, as in the case above. Does this effect the capacitance matrix that is calculated? Would it be more accurate to define another substrate plate coplanar with the bottom of the lines? Or maybe small plates to fill in the gaps? |
| Enrico |
Posted - Jun 11 2014 : 00:26:15
The '+' statement collates together panel definitions contained in different files. However it will not join different conductors, allowing multiple conductor definitions in the files. Conductors are distinguished by name.
So, in a nutshell, if the panels belong to the same conductor, you must use the same conductor name in the definition files. The following corrected input file will output a 2x2 capacitance matrix (modifications in red).
Best Regards,
Enrico
*Gap Capacitor 10 um gap (Ver2)
*substrate
D PlateSubstrate.txt 1 11.7 0.0 0.0 0.0 0.00025 0.00025 0.00025 -
D SubstrateCuff.txt 1 11.7 0.0 0.0 0.0 0.00025 0.00025 0.00025
*lines (10um gap)
C LinePlate.txt 11.7 0.0 0.000245 0.0005 +
C LineCap.txt 1 0.0 0.000245 0.0005
C LinePlate.txt 11.7 0.000255 0.000245 0.0005 +
C LineCap.txt 1 0.000255 0.000245 0.0005
End
File PlateSubstrate.txt
Q PlateSubstrate 0.0 0.0 0.0 0.0005 0.0 0.0 0.0005 0.0005 0.0 0.0 0.0005 0.0
End
File SubstrateCuff.txt
Q SubstrateCuff 0.0 0.0 0.0 0.0 0.0 0.0005 0.0005 0.0 0.0005 0.0005 0.0 0.0
Q SubstrateCuff 0.0005 0.0 0.0 0.0005 0.0 0.0005 0.0005 0.0005 0.0005 0.0005 0.0005 0.0
Q SubstrateCuff 0.0005 0.0005 0.0 0.0005 0.0005 0.0005 0.0 0.0005 0.0005 0.0 0.0005 0.0
Q SubstrateCuff 0.0 0.0005 0.0 0.0 0.0005 0.0005 0.0 0.0 0.0005 0.0 0.0 0.0
End
File LinePlate.txt
Q Line 0.0 0.0 0.0 0.000245 0.0 0.0 0.000245 0.00001 0.0 0.0 0.00001 0.0
End
File LineCap.txt
Q Line 0.0 0.0 0.0 0.000245 0.0 0.0 0.000245 0.0 0.0000002 0.0 0.0 0.0000002
Q Line 0.000245 0.0 0.0 0.000245 0.0 0.0000002 0.000245 0.00001 0.0000002 0.000245 0.00001 0.0
Q Line 0.000245 0.00001 0.0 0.000245 0.00001 0.0000002 0.0 0.00001 0.0000002 0.0 0.00001 0.0
Q Line 0.0 0.00001 0.0 0.0 0.00001 0.0000002 0.0 0.0 0.0000002 0.0 0.0 0.0
Q Line 0.0 0.0 0.0000002 0.000245 0.0 0.0000002 0.000245 0.00001 0.0000002 0.0 0.00001 0.0000002
End
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| carolyn |
Posted - Jun 09 2014 : 21:37:47
Thanks for your help, here is the whole thing
*Gap Capacitor 10 um gap (Ver2)
*substrate
D PlateSubstrate.txt 1 11.7 0.0 0.0 0.0 0.00025 0.00025 0.00025 -
D SubstrateCuff.txt 1 11.7 0.0 0.0 0.0 0.00025 0.00025 0.00025
*lines (10um gap)
C LinePlate.txt 11.7 0.0 0.000245 0.0005 +
C LineCap.txt 1 0.0 0.000245 0.0005
C LinePlate.txt 11.7 0.000255 0.000245 0.0005 +
C LineCap.txt 1 0.000255 0.000245 0.0005
End
File PlateSubstrate.txt
Q PlateSubstrate 0.0 0.0 0.0 0.0005 0.0 0.0 0.0005 0.0005 0.0 0.0 0.0005 0.0
End
File SubstrateCuff.txt
Q SubstrateCuff 0.0 0.0 0.0 0.0 0.0 0.0005 0.0005 0.0 0.0005 0.0005 0.0 0.0
Q SubstrateCuff 0.0005 0.0 0.0 0.0005 0.0 0.0005 0.0005 0.0005 0.0005 0.0005 0.0005 0.0
Q SubstrateCuff 0.0005 0.0005 0.0 0.0005 0.0005 0.0005 0.0 0.0005 0.0005 0.0 0.0005 0.0
Q SubstrateCuff 0.0 0.0005 0.0 0.0 0.0005 0.0005 0.0 0.0 0.0005 0.0 0.0 0.0
End
File LinePlate.txt
Q LinePlate 0.0 0.0 0.0 0.000245 0.0 0.0 0.000245 0.00001 0.0 0.0 0.00001 0.0
End
File LineCap.txt
Q LineCap 0.0 0.0 0.0 0.000245 0.0 0.0 0.000245 0.0 0.0000002 0.0 0.0 0.0000002
Q LineCap 0.000245 0.0 0.0 0.000245 0.0 0.0000002 0.000245 0.00001 0.0000002 0.000245 0.00001 0.0
Q LineCap 0.000245 0.00001 0.0 0.000245 0.00001 0.0000002 0.0 0.00001 0.0000002 0.0 0.00001 0.0
Q LineCap 0.0 0.00001 0.0 0.0 0.00001 0.0000002 0.0 0.0 0.0000002 0.0 0.0 0.0
Q LineCap 0.0 0.0 0.0000002 0.000245 0.0 0.0000002 0.000245 0.00001 0.0000002 0.0 0.00001 0.0000002
End |
| Enrico |
Posted - Jun 06 2014 : 20:28:36
Can you share a complete input file (possibly the simplest set of input files giving you the unexpected result)?
If you get to the simplest form, you should be able to C&P the files into the forum, or you can send them to me as attachment, but I would prefer the former, for the benefit of every Forum user.
Best Regards,
Enrico
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